Conventional computing equipment typically utilize RS-232 type transceiver circuits for the communication of data. Conventional RS-232 data transceivers operate from .+-.12 volt power supply rails and function to bidirectionally convert data between the standard digital logic signal (0-5 volts) representation and logically equivalent transmission voltage levels (.+-.12 volts). The ordinary digital logic levels exist only within the relatively small and electromagnetic interference (EMI) controlled area of the computer equipment enclosure. The relatively much greater RS-232 transmission voltage levels are used to transfer data through less EMI protected data cables that are often of substantial length. Such cables are therefore further subject to signal attenuation. The use of higher transmission voltage levels, however, allows a relatively large signal-to-noise ratio to be maintained even in the presence of significant signal attenuation.
In response to the continuing pressure to reduce the size, board level complexity and cost of computer equipment, a single integrated circuit embodying a pair of conventional RS-232 data transceivers and a charge pump circuit for generating the required .+-.12 volt power from a single 5 volt input power source has been developed. For example, the device disclosed in U.S. Pat. No. 4,636,930, Bingham, et al, issued Jan. 13, 1987 and entitled "Integrated Dual Charge Pump Power Supply and RS-232 Transmitter/Receiver", illustrates a workable approach to providing a single chip RS-232 transceiver. The circuit disclosed utilizes four discrete charge reservoir capacitors, linked by an integrated charge pump switch network, to provide the necessary .+-.12 volts required by co-integrated RS-232 transceiver circuits. Two reservoir capacitors are used alternatingly to accumulate and transfer charge. The remaining two reservoir capacitors are utilized to receive charge from the transfer reservoir capacitors and to support the current transfer requirements of the respective .+-.12 volt supply lines between charge transfers.
Although the Bingham, et al charge pump circuit provides an adequate solution and is suitable for monolithic integration, the circuit has two distinct disadvantages. The first disadvantage is that it requires four discrete charge reservoir capacitors of substantial size. Each charge reservoir capacitor is typically on the order of 100 microfarads. Capacitors of such size directly increase the amount of printed circuit board surface area and enclosure volume required to implement a complete RS-232 transceiver circuit.
The second and perhaps more significant disadvantage is that the monolithic fabrication of the Bingham, et al circuit requires several significant, if not critical, specialized process dependant integrated features to prevent incorrect operation of the circuit due to the occurrence of parasitic transistors. The operation of the switching network in effectively switching the charge reservoir capacitors between circuit nodes results in impulse currents of sufficient magnitude to initiate the operation of even weakly parasitic transistors. Consequently, the design of the Bingham, et al circuit requires several clamping structures to be implemented to block potential parasitic current paths. The implementation of current clamps require additional processing steps, with an increase in the complexity of fabrication, in order to insure ensure proper operation.